Qualcomm Canada ULC
Engineering Group, Engineering Group > ASICS Engineering
Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.
Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5G's potential into world-changing technologies and products. This is the Invention Age and this is where you come in.
Be a part of the Display team responsible for the development of Next Generation Display Processing Units (DPUs) that are key to delivering vivid and stunning visual experiences in the mobile, compute, automotive and IoT markets. The DPU is responsible for high performance and low power composition, processing, and color management of image streams from the GPU, CPU, video decoder and camera. It then formats, packetizes, and synchronizes the composited image for display through display interfaces such as DSI and DisplayPort.
We are seeking an ASIC Design Engineer with experience in high speed digital video interfaces interested in developing world-class display solutions. You will work within a multi-disciplinary, multi-site team of architects, designers and verification engineers and will be responsible for the protocol layer design of high-speed digital video interfaces like DisplayPort, MIPI-DSI, Thunderbolt, HDMI, etc.
Job responsibilities include:
Develop detailed understanding of relevant industry standards including functional, conformance and test specifications
Develop micro-architecture and module specifications
Model and analyze performance, area, power, and system cost tradeoffs for different micro-architectures
Work closely with the mixed-signal PHY team to define PHY requirements and design partitioning
Implement modules and sub-systems in Verilog RTL
Work closely with the design verification team to define verification methodology, review test plans and develop reference and bus-functional models
Implement and debug tests at the module, sub-system and SoC levels throughout the ASIC development cycle (pre- and post-silicon)
Develop and debug synthesis and timing constraints, review clocks, and layout to achieve netlist synthesis and static timing closure
Make significant contributions to silicon debug and analysis
• Bachelor's degree in Science, Engineering, or related field.
• 2+ years ASIC design, verification, or related work experience.
3 - 5+ years of experience
Previous experience with architecting or designing high speed digital video or data interfaces and experience with digital video concepts
Familiarity with high-speed video or data interfaces (ie DisplayPort, MIPI-DSI, Thunderbolt, HDMI, PCI-E, etc.)
Familiarity with multimedia technologies (Display, Video, Graphics)
Experience with the following design tools: o ASIC design and simulation tool sets (Synopsys/Cadence Mentor - DC, RC, Power Compiler, Primetime, Modeltech, VCS, NCSIM, power theatre, etc.) o Design rule check (Spyglass, etc.) o Formal verification (Formality, LEC, etc.) o Power analysis and simulation o Scripting languages (PERL, TCL, C, etc.)
Detail oriented with strong analytical and debugging skills
Strong communication (written and verbal) and collaboration skills
Applicants: If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to accommodationsupport
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